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    Wednesday, December 1, 2021

    A look at some of the biology and virus HPC simulations coming when the Frontier supercomputer launches Computer Science

    A look at some of the biology and virus HPC simulations coming when the Frontier supercomputer launches Computer Science


    A look at some of the biology and virus HPC simulations coming when the Frontier supercomputer launches

    Posted: 01 Dec 2021 08:12 AM PST

    If You're Not Writing a Program, Don't Use a Programming Language (2018) [pdf]

    Posted: 01 Dec 2021 10:15 AM PST

    What does it mean if a pipeline is "full" vs not "full" in computer architecture?

    Posted: 01 Dec 2021 04:24 PM PST

    The slides/lecture for my computer architecture course doesn't explain what it means to be "full", but keeps using the term. Ditto for anything that I've come across when googling about this. Can someone explain what this means?

    submitted by /u/Missing_Back
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    Quantinuum Launches With Over $270 Million To Tackle Quantum Computing’s Biggest Challenges

    Posted: 01 Dec 2021 12:53 AM PST

    Can a CPU instruction alter another that's stored in the CPU?

    Posted: 30 Nov 2021 11:07 PM PST

    Suppose I want to make code such that if a given instruction isn't skipped over by a branch, it changes the instruction n spaces after it in the queue to a different instruction. Can I do that?

    submitted by /u/Mutant_Llama1
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    Quantinuum: A New Quantum Computing Company Is Formed From Merger Of Honeywell Quantum Solutions And Cambridge Quantum

    Posted: 01 Dec 2021 03:41 PM PST

    What are your favorite Comp Sci YouTube channels?

    Posted: 30 Nov 2021 07:24 AM PST

    I watch a bit of YouTube before bed every night and I find whatever I watch really sticks in my head so I figured maybe I should be watching more applicable content to what I like.

    I like to program with python and C++ and would love to find some good channels that revolve around these languages and concepts within them such as data structures, OOP, etc.

    Also a huge fan of machine learning, AI, and data science.

    Thanks!

    Edit: Thank you guys for all the suggestions! Looking forward to digging through them! Hope this post helps those in my shoes as well

    submitted by /u/KryptoBoiz
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    Concept idea I had: a processor with only a NAND gate.

    Posted: 30 Nov 2021 06:06 PM PST

    I came up with an idea for a processor whose ALU is reduced entirely to a single, two-input NAND gate. The rest of the processor would just be a cache full of individual bits/booleans, a multiplexer for each input and a demultiplexer for the output. The goal is to minimize size, complexity and delay of the circuit regardless of how much more difficult it makes programming, as long as all of the normal functions of code can be performed.

    Current plan is to have the "OP code" consist entirely of log2(N) bits for the input index (N being the number of bits in the cache), another log2(N) bits that represents both the other input and the output (the second input is overridden with the output to save bits), 1 bit meaning "stop the program", and 1 meaning "shift an extra time".

    Every rising clock edge triggers the D-latch updating the output result. Falling clock edge shifts the entire cache over 1 bit. The OP codes of the instructions would be stored amongst them, so a separate register doesn't need to be used for them.

    The indexes are fed directly into the multiplexors. The extra shift bit is xor'd with the clock bit, triggering an extra falling edge to act as a jump. The stop bit disables the shifting, so the program stops running.

    The memory would be divided into interwoven blocks. If A is the number of bits reserved for the OP code (ceil(log2(N))+2), there would be N/A sections of code, of which the first bit is the OP code. Using more instructions means having less space left over for other variables, but oddly, the storage efficiency increases the more storage you have. The shift brings it to the next OP code, but you must take that into account when recalling values you've stored, as well. You can probably somehow configure the logic so that your variables and instructions need no separation, by setting the values just right to trigger the right actions when read as op codes, but otherwise limiting the number of op codes to maximize other storage would be a major consideration for the programmer, using the STOP bit to stop it after the OP codes end.

    Suppose we use 2048 total bit locations, giving 256 bytes of storage. log2(2048)=11, so we need 22 bits of storage for the base "OP code", plus 1 for the clock bit and 2 for the stop bit. floor(2048/24)=85.

    So every 85th bit is the OP code. After performing that operation, it shifts to the next one.

    If we group the bits into bytes and address the bytes instead of individual bits, we can reduce the size of the OP code in exchange for adding more NAND gates. A parallel bitwise operation doesn't take any more time than a single bit, right?

    Doing it that way, if we have 2048 bits, log2(256)=8, 8*2=16, 16+2 = 18, 2048/18 = 113. So now, only every 113th bit is part of the OP code, so you get more memory to actually work with. Optimally, the number of bits in the OP code should match the bit size of the variables you're indexing, but I'm not sure how to find the right number of registers to make that happen.

    I/O seems pretty straightforward, just letting the user set the values of the bits directly or through other logic via buttons.

    The other main question I'm left with, is how it would work with external memory.

    submitted by /u/Mutant_Llama1
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    looking to create a community around theoretical CS

    Posted: 30 Nov 2021 08:07 AM PST

    sup guys & girls (writing here because r/computerscience thought i was asking for career advice lmao)

    I haven't posted here yet, i think, but i'm a Senior undergrad in CS and am really interested in Theoretical CS / Mathemetics and Physics (yeah the horrible 3).

    Anyways, I'm interested in maybe creating a community around theoretical computer science, where articles can be written (at any level, since mine is still quite low), as a sort of main repo and to maybe spread the word more around what TCS actually is, something like what Back to Back SWE built is super inspiring to me. (When i told my parents i wanted to do TCS they thought i was going to be doing IT support, and my friends think I can hack games for them thanks to my almost completed degree).

    So yeah, just an idea. I'm heavily considering doing it myself first off, and see if people want to join but if some ppl here are interested in joining in, shoot me a DM / leave a comment :)

    Thanks for reading

    submitted by /u/Kawakzaky
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    Scaling teams like parallel computing systems: Amdahl's law

    Posted: 30 Nov 2021 03:49 AM PST

    Community Talk: Low code API Testing for Microservices (Prasad Deshpande, Google)

    Posted: 30 Nov 2021 06:25 PM PST

    Minimum Spanning Tree Prim vs Kruskal?

    Posted: 29 Nov 2021 09:13 PM PST

    Do the Prim's algorithm and the Kruskal's algorithm always obtain the same minimum spanning tree (MST) on a given input graph?

    I have tried drawing a bunch of graphs with non-unique edges and executing both algorithms (for Prim, I tried every different starting node) and always end up with the same MST as Kruskal.

    submitted by /u/Decent-Mixture-7670
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    Sql server - how to I solve this problem?

    Posted: 30 Nov 2021 11:36 PM PST

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